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Home : Computers : Hardware : Buses : PCI Express
PCI Express
Bus specification designed to supersede PCI. PCI Express (PCIe) provides several improvements over its predecessor:
- It enables Quality of Service (QoS) which is a means to prioritise more time critical traffic (like an audio or video stream) to reduce break up.
- Supports multiple lanes that can be aggregated for a single link to provide increased bandwidth. (Each lane can transmit up to 2.5gb/sec, and the protocol supports up to 32x)
- Uses a point-to-point bus topology where a shared switch replaces the shared bus that PCI used.
NB: PCI-Express is sometimes referred to as 3rd generation I/O (3GIO)architecture.
Sites in PCI Express
Ars Technica
Technical overview explaining basic PC system architecture, an explanation of how PCI and PCI-X work, and an outline of the benefits of PCIe, and PCIe to PCI bridging.
PCI-SIG
Standards development group. Offers details of technology specifications, document review and compliance testing, test software and checklists and press releases.
Intel.com
Developer network for PCI Express architecture. Offers overview of the specification, introductory videos, details of books for developers, press releases and how to join the network.
Tom's Hardware Guide
Article discussing the impact of PCI Express on the graphics and gaming market, its relative performance compared to AGP, and the responses of the two main graphic cards manufacturers to its introduction.
AnandTech
Article covering history of the bus market and an explanation of how the specification works.
Neoseeker.com
Article including a technology overview, comparison with older buses and considerations of its future prospects. |
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